VDMOSFET for Discrete Power MOSFETs

Model Description This lumped-charge VDMOS model provides a physically-based compact model for discrete power MOSFET devices. This model is designed to replace the macromodels commonly used for power MOSFETs in many simulators. The present model has been extensively revised from the original 1995 version to improve robustness, simulation speed and accuracy. The current model includes moderate inversion, smooth capacitance characteristics for all modes of operation, and mobility effects due to high fields.
Model Parameters and Default Values kp = 1.70, 
lda = 0.0, 
vsat = 500, 
theta = 0.0, 
cgson = 500p, 
cgdon = 370p, 
cj0 = 550p, 
cgov = 0.0, 
vtb = 3.3, 
phisb = 1.0,
vfbd = 0.775,
vtd = 0.4,
phidb = 0.8,
iso = 5e-10,
no = 1.5,
tau = 0.1e-6,
tm = 10e-6,
m = 0.45,
rg = 0.05,
rd = 0.003,
Transconductance param.
Channel length modulation
Velocity saturation param.
Mobility reduction due to vgs
Gate-source ON capacitance
Gate-drain ON capacitance
ON junction capacitance
Overlap capacitance
P-body threshold voltage
P-body built in voltage
Drain-surface flatband voltage
N-drain threshold voltage
N-body built in voltage
Reverse saturation current
Emission coefficient
Carrier lifetime
Transit time
Junction gradient factor
Gate internal resistance
Drain internal resistance
Performance Level: ACCURATE
Quality Classification: 2B
This model has been extensively used.

All parameters can be extracted from basic electric measurements but optimization could be helpful for a few of the parameters.

Original Support for Model Development CDADIC, 1992-98
Documentation The current version of this VDMOS model is described in the MSEE Thesis of Yeshwant Subramanian at the University of Washington, "Development of Compact Vertical and Lateral DMOS Models", August 1998.

Simulation data is also given in Yeshwant Subramanian, P. O. Lauritzen, K.R. Green, "Two Lumped-Charge Based Power MOSFET Models", Proc. of IEEE Workshop on Computers in Power Electronics, Como, Italy, July1998, pp. 1-10. 

The 1995 version of this VDMOS model is described in the paper by I. Budihardjo and P. O. Lauritzen, " The lumped-charge power MOSFET model, including parameter extraction", IEEE Trans. Power Electronics, Vol. 10, No. 5, May 1995. Warning, many of the equations in this paper have major typographical errors. Corrected copies are available here.

The 1995 version is also in the 1995 University of Washington Ph.D. dissertation by Irwan Budihardjo, "A charge based power MOSFET model".

Application Information Power converter application data is given in I. Budihardjo, P. O. Lauritzen, C. Xu, "Simulation of High Frequency PWM and Quasi-Resonant Converters Using the Lumped-Charge Power MOSFET Model, IEEE APEC Proc., pp.1042-1048, Feb. 1994. 

Application of the model to RF power applications is given in the Georgia Tech Ph.D. Dissertation of John H. Bordelon, "A Large-Signal Model for the RF Power MOSFET", June 1999.

Model Source Code  

Latest update: May 20, 2008 by plauritz@ee.washington.edu