| Model Description | This model is a thermal power diode model using the lumped-charge technique. The model generates the dynamic device temperature and thermal characteristics from internal power dissipation. The model also includes voltage-dependent reverse recovery, forward recovery, conductivity modulation, emitter recombination and includes both high and low level injection. Only the capacitance model is taken from the standard SPICE diode model. | |
| Model Parameters and Default Values | QB=1e-8 (Coulombs) Qp0=1e-16, qp0 > 1e-8 b=3, tau3=1u, EM=1e-10, T0=1u, m=0.5, VJ=0.7, fc=0.5, rs=.05, cjo=100p, PHIB=610.5, (Volts) IB=1.11e3 (Amperes) Tnom=27, Trs=0, TEM=0. |
Majority carrier base charge Minority carrier base charge Electron to hole mobility ratio Carrier lifetime Emitter rec. parameter Transit time of electrons Grading coefficient Built-in potential Foward bias cap. factor Series resistance Zero bias capacitance Voltage to deplete diode base Rev. rec. current modulation Default Device temperature Temperature coefficient of series resistance EM temperature coefficient tau3 temperature coefficient |
| Performance Level: | THERMAL | |
| Quality Classification: | 2B This model has been extensively used. Parameter extraction is available. |
|
| Original Support for Model Development | CDADIC 1997 | |
Documentation |
The thermal model is not documented. The original accurate diode model is documented in: C. L. Ma, P. O. Lauritzen, J. Sigg, "Modeling of Power Diodes with the Lumped-Charge Modeling Technique, IEEE Transactions on Power Electronics, Vol. 12, No. 3, pp . 398-405, May 1997. | |
| Download Model Source Code | Saber
MAST HDL Model Verilog-A HDL Model |
|