Compact Power Semiconductor Models

Compact Models for Power Semiconductor Devices

Latest update: January 23, 2013

Many power semiconductor device models were developed at the University of Washington through a research program supported by NSF-CDADIC (NSF Center for Design of Analog-Digital Integrated Circuits) during the period from 1990 through1998. MSEE and Ph.D. students under the direction of Professor Peter O. Lauritzen developed most of the models. All of these models are now in the public domain, and the significant ones are available for public downloading of model source code and documentation. Several newer and updated models have been added from colleagues in industry and other universities. NSF-CDADIC provided a small grant in 1999 to support the initial preparation of this Web page.

Students at the Indian Institute of Technology, Madras, India initiated the development of some models as a result of P. O. Lauritzen's visit there as a Fulbright Senior Lecturer in 1997. Again in 1999, P. O. Lauritzen was a Danfoss Visiting Professor at Aalborg University in Denmark where development of the IGBT and TRIAC model were initiated.

The models are for discrete and integrated circuit power semiconductor devices and related models. All of the models are implemented in Saber MAST HDL (Hardware Description Language) for use on the Saber simulator currently available from Synopsys. Several of the models are also available for downloading in the Verilog-A HDL. Compiled models are not available. The models can be translated into VHDL-AMS or Verilog-A IEEE Standard HDLs or specific HDLs for use on other simulators. A number of the models have already been translated for use on other simulators. Models in Verilog-A HDL are available here thanks to developers from ON Semiconductor and from ABB.

These models are being made available to the general public without restrictions to promote their widespread use. Published model equations and source code is essential so models can be easily understood and be installed on a variety of different simulators. With source code available, users can also assist in identifying and fixing bugs in the models. Please send information on bugs and bug fixes to P. O. Lauritzen so that they can be incorporated into the public models.

Table of Available Models and Their Characteristics

Model Type	Performance Rating	Quality Classification	Current Availability
Diode Models
Diode with reverse recovery	Basic	3B	Verilog-A Model Revised January 2013
Diode with forward and reverse recovery	Basic	3B	YES
Diode, voltage-dependent reverse recovery	Intermediate	1B	Verilog-A Model Revised January 2013
Power diode with forward and reverse recovery	Accurate	2B	YES
Electro-thermal power Diode	Thermal	2B	New Verilog-A Model January 2013
Avalanche and tunneling breakdown	Accurate	1B	Unfinished
Power BJT Model
BJT with static and dynamic saturation.	Accurate	1B	YES
Power MOSFET Models
LDMOS for Smart Power IC design	Accurate	1B	YES
Parasitic BJT for LDMOS	Intermediate	1B	YES
VDMOS for discrete power MOSFETs	Intermediate	2B	YES
IGBT Models
Punch-through IGBT	Basic	2B	Also in Verilog-A
Thyristor Models
SCR/GTO, simple physical-empirical model	Basic	2B	YES
Triac, simple physical-empirical model	Basic	2B	NEW
Diac, simple physical-empirical model	Basic	2B	YES
SCR with dynamic charge storage effects.	Accurate	1A	Commercial model also available in Saber
GTO with dynamic charge storage effects.	Accurate	1A	Commercial model also available in Saber

Key to Model Performance Ratings

Basic	Simple equation set with easy parameter extraction and fast simulation time. Typically, only one system variable is used in a model to keep simulation time fast.
Intermediate	Basic model with some additional features to increase accuracy.
Accurate	High accuracy, but with slower simulation time and more difficult parameter extraction.
Thermal	An Accurate model with additional capability to generate dynamic device temperature and thermal characteristics from internal power dissipation and heat sink characteristics. Only a diode thermal models is available.

Key to Model Quality Classifications

1	Model developed as student project without much testing or debugging. .
2	Model debugged and matched against extensive experimental data
3	Some productization has been completed to make the model robust.

A	Parameter extraction procedures are NOT available
B	Parameter extraction procedures ARE available

Table of Available Models and Their Characteristics

Survey article on compact models for power devices.