Welcome to Richard Shi's VHDL-AMS Research Page

VHDL-AMS Language: Design, Modeling and Methodologies

PI | Students | Sponsors | Publications

Principal Investigator

Richard Shi

Participating Students:

Sponsors:

Publications

C.-J. Shi and A. Vachoux, VHDL-AMS Design Objectives and Rationale, Chapter 1 and pp. 1-30 in Modeling in Analog Design, vol. 2 in Series Current Issues in Electronic Modeling (CIEM), Jean-Michel Berge, Oz Levia and Jacques Rouillard (eds.), Kluwer Academic Publishers, 1995.
C.-J. Shi and W. H. Kao, ``Guest editorial---special issue on behavioral modeling and simulaiton of mixed-signal/mixed-technology systems", IEEE Trans. Circuits and Systems --- II: Analog and Digital Signal Processing, vol. 46, no. 10, pp. 1261-1261, Oct. 1999.
C.-J. Shi, ``Entity overloading for mixed-signal abstraction in VHDL", Journal of Information Science and Engineering, vol. 14, no.3, pp. 633-644, September 1998.
N. Godambe and C.-J. Shi, ``Behavioral-level noise modeling and jitter simulation of phase-locked loops with faults using VHDL-AMS", Journal of Electronic Testing: Theory and Applications (JETTA), vol. 9, no. 3, August 1998.
B. Hu, Z. Li, L. Zhou, C.-J. R. Shi, K.-H. Baek, and M.-J. Choe, "Model-compiler based efficient statistical circuit analysis: An industry case study of a 4GHz/6-bit ADC/DAC/DEMUX ASIC", Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS'05), Kobe, Japan, May 2005 (accepted and to appear).
L. Yang, C. Wakayama, and C.-J. R. Shi, "Noise-aware behavioral modeling of a fractional-N frequency synthesizer", Proc. Great Lake Symp. on VLSI, April 2005 (accepted and to appear)
E. Normark, L. Yang, C. Wakayama, P.V. Nikitin, and C.-J. R. Shi, "VHDL-AMS modeling and simulation of a Pi/4 DQPSK transceiver system", pp. 119-124 in Proc. IEEE Behavioral Modeling and Simulation Conf. (BMAS'04), San Jose, CA, Oct. 2004.
B. Wan, P. V. Nikitin, and C.-J. R. Shi, "Circuit level modeling and simulation of mixed-technology systems", pp. 113-116 in Proc. IEEE Systems-on-Chip Conf (SoC'04)., Santa Clara, CA, Sept. 2004.
P. V. Nikitin, E. Normark, C. Wakayama, and C.-J. R. Shi, "VHDL-AMS modeling and simulation of a BPSK transceiver system", Proc. of IEEE International Conf. on Circuits and Systems for Communications, Moscow, Russia, June 2004.
P. Nikitin, V. Jandhyala, D. White, N. Champagne, J. D. Rockway, C.-J. R. Shi, C. Yang, G. Ouyang, Y. Wang, R. Sharpe and J. Rockway, "Modeling and simulation of circuit-electromagnetic effects in electronic design flow," pp. 244-249 in Proc. IEEE 5th International Symp. on Quality Electronic Design (ISQED'04), San Jose. CA, March 2004.
P. Nikitin, W. Lam, and C.-J. R. Shi, "Parametric equivalent circuit extraction for VLSI structures," pp. 198-203 in Proc. IFIP VLSI-SoC Symp., Darmstadt, Germany, Dec. 2003 (46 out of 146 accepted as regular papers).
P. Nikitin, E. Normark, and C.-J. R. Shi, "Coupled electrical-thermal modeling in VHDL-AMS," pp. 128-133 in Proc. IEEE International Workshop on Behavioral Modeling and Simulation (BMAS'03), San Jose, CA, Oct. 2003 (acceptance rate: 66%).
P. Nikitin and C.-J. R. Shi, "Modeling partial differential equations in VHDL-AMS," pp. 345-348 in Proc. IEEE Application Scientific Integrated Circuits/Systems-on-Chip Conf. (SOC'03), Portland, Oregon, Sept. 2003.
L. Zhou, H. Bo, B. Wan, and C.-J. R. Shi, ``Rapid BSIM model implementation with VHDL-AMS/Verilog-AMS and MCAST compact model compiler", pp. 285-286 in Proc. IEEE Application Scientific Integrated Circuits/Systems-on-Chip Conf. (SOC'03), Portland, Oregon, Sept. 2003. D. Lungeanu and C.-J. R. Shi, ``Parallel and distributed VHDL simulation", pp.658-662 in Proc. Design, Automation and Test in Europe (DATE'2000), Paris, France, March 2000 (106 out of 306 were accepted as regular papers).
N. Godambe and C.-J. Shi, ``Behavioral-level noise modeling and jitter simulation of phase-locked loops with faults using VHDL-AMS", pp. 177--183 in Proc. IEEE VLSI Test Symp. (VTS'97), Monterey, CA, April 27 - 30, 1997 (62 out of 178 submissions were accepted).
C.-J. Shi, Y. Ye and X. Tan, ``Behavioral model optimization via sensitivity-enhanced genetic search", pp. 17-24 in Proc. IEEE/VIUF International Workshop on Behavioral Modeling and Simulation, Washington DC, Oct. 1997.
C.-J. Shi, ``Entity overloading for mixed-signal abstraction in VHDL", pp. 562-567 in Proc. European Design Automation Conference (EuroDAC/EuroVHDL'96), Geneva, Switzerland, September 16-20, 1996. (Nominated by the program committee for the Best Paper Award.)
C.-J. Shi and N. Godambe, ``Behavioral fault modeling and simulation of phase-locked loops using a VHDL-A like language", pp. 245-250 in Proc. IEEE International ASIC Conference & Exhibit (ASIC'96), Rochester, N.Y., September 23-27, 1996. (Acceptance Ratio: 0.5)
C.-J. Shi, E. Christen, P. Liebmann, S. Krolikoski, and W. Zhou, ``VHDL-A: Analog extension to VHDL", pp. 160-165 in Proc. IEEE International ASIC Conference & Exhibit, Sept. 1994.
C.-J. Shi, ``Towards a unified operational semantics for behavior specification of VLSI systems", International Workshop on Computer-Aided Co-Design, Cambridge, Massachusetts, Oct. 7-8, 1993.